{
    "pips": {
        "BRKH_GTX.BRKH_GTX_NORTHREFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_NORTHREFCLK0_LOWER"
        },
        "BRKH_GTX.BRKH_GTX_NORTHREFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_NORTHREFCLK1_LOWER"
        },
        "BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_REFCLK0_LOWER"
        },
        "BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_REFCLK0_LOWER"
        },
        "BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_REFCLK0_UPPER"
        },
        "BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_REFCLK0_UPPER"
        },
        "BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_REFCLK1_LOWER"
        },
        "BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_REFCLK1_LOWER"
        },
        "BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_REFCLK1_UPPER"
        },
        "BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_REFCLK1_UPPER"
        },
        "BRKH_GTX.BRKH_GTX_SOUTHREFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_SOUTHREFCLK0_UPPER"
        },
        "BRKH_GTX.BRKH_GTX_SOUTHREFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "BRKH_GTX_SOUTHREFCLK1_UPPER"
        }
    },
    "sites": [],
    "tile_type": "BRKH_GTX",
    "wires": {
        "BRKH_GTX_NORTHREFCLK0_LOWER": null,
        "BRKH_GTX_NORTHREFCLK0_UPPER": null,
        "BRKH_GTX_NORTHREFCLK1_LOWER": null,
        "BRKH_GTX_NORTHREFCLK1_UPPER": null,
        "BRKH_GTX_REFCLK0_LOWER": null,
        "BRKH_GTX_REFCLK0_UPPER": null,
        "BRKH_GTX_REFCLK1_LOWER": null,
        "BRKH_GTX_REFCLK1_UPPER": null,
        "BRKH_GTX_SOUTHREFCLK0_LOWER": null,
        "BRKH_GTX_SOUTHREFCLK0_UPPER": null,
        "BRKH_GTX_SOUTHREFCLK1_LOWER": null,
        "BRKH_GTX_SOUTHREFCLK1_UPPER": null
    }
}