{
    "pips": {},
    "sites": [],
    "tile_type": "HCLK_DSP_L",
    "wires": {
        "HCLK_DSP_ACIN0": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN1": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN2": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN3": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN4": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN5": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN6": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN7": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN8": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN9": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN10": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN11": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN12": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN13": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN14": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN15": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN16": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN17": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN18": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN19": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN20": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN21": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN22": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN23": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN24": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN25": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN26": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN27": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN28": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_ACIN29": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN0": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN1": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN2": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN3": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN4": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN5": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN6": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN7": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN8": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN9": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN10": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN11": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN12": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN13": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN14": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN15": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN16": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_BCIN17": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_CARRYCASCIN": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_CK_BUFHCLK0": null,
        "HCLK_DSP_CK_BUFHCLK1": null,
        "HCLK_DSP_CK_BUFHCLK2": null,
        "HCLK_DSP_CK_BUFHCLK3": null,
        "HCLK_DSP_CK_BUFHCLK4": null,
        "HCLK_DSP_CK_BUFHCLK5": null,
        "HCLK_DSP_CK_BUFHCLK6": null,
        "HCLK_DSP_CK_BUFHCLK7": null,
        "HCLK_DSP_CK_BUFHCLK8": null,
        "HCLK_DSP_CK_BUFHCLK9": null,
        "HCLK_DSP_CK_BUFHCLK10": null,
        "HCLK_DSP_CK_BUFHCLK11": null,
        "HCLK_DSP_CK_BUFRCLK0": null,
        "HCLK_DSP_CK_BUFRCLK1": null,
        "HCLK_DSP_CK_BUFRCLK2": null,
        "HCLK_DSP_CK_BUFRCLK3": null,
        "HCLK_DSP_CK_IN0": null,
        "HCLK_DSP_CK_IN1": null,
        "HCLK_DSP_CK_IN2": null,
        "HCLK_DSP_CK_IN3": null,
        "HCLK_DSP_CK_IN4": null,
        "HCLK_DSP_CK_IN5": null,
        "HCLK_DSP_CK_IN6": null,
        "HCLK_DSP_CK_IN7": null,
        "HCLK_DSP_CK_IN8": null,
        "HCLK_DSP_CK_IN9": null,
        "HCLK_DSP_CK_IN10": null,
        "HCLK_DSP_CK_IN11": null,
        "HCLK_DSP_CK_IN12": null,
        "HCLK_DSP_CK_IN13": null,
        "HCLK_DSP_MULTSIGNIN": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN0": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN1": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN2": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN3": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN4": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN5": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN6": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN7": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN8": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN9": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN10": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN11": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN12": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN13": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN14": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN15": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN16": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN17": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN18": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN19": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN20": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN21": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN22": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN23": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN24": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN25": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN26": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN27": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN28": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN29": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN30": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN31": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN32": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN33": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN34": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN35": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN36": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN37": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN38": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN39": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN40": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN41": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN42": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN43": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN44": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN45": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN46": {
            "cap": "31.166",
            "res": "0.000"
        },
        "HCLK_DSP_PCIN47": {
            "cap": "31.166",
            "res": "0.000"
        }
    }
}